1. Field of the Invention
The present invention relates to a semiconductor memory device and a dynamic latch refresh method thereof and, more particularly, to a NAND cell flash memory.
2. Description of the Related Art
A sense amplifier of a NAND cell flash memory includes a plurality of latches, as disclosed in, e.g., Jpn. Pat. Appln. KOKAI Publication No. 2004-118940. A quaternary sense amplifier requires more latches than a binary one; an octonary one, more latches than a quaternary one; and a hexadecimal one, more latches than an octonary one. For example, a quaternary sense amplifier requires only three latches; however, a hexadecimal sense amplifier requires six (four corresponding to the 4-bit structure of the hexadecimal sense amplifier, one for program data storage, and one for quick pass write).
In a NAND cell flash memory, generally, one sense amplifier is necessary for one bit line pair. When the number of latches in each sense amplifier increases, the size of the sense amplifier increases noticeably, resulting in a large chip size.